{"doi":"10.15479/at:ista:1130","alternative_title":["ISTA Thesis"],"year":"2016","_id":"1130","user_id":"c635000d-4b10-11ee-a964-aac5a93f6ac1","author":[{"first_name":"Thorsten","last_name":"Tarrach","id":"3D6E8F2C-F248-11E8-B48F-1D18A9856A87","orcid":"0000-0003-4409-8487","full_name":"Tarrach, Thorsten"}],"has_accepted_license":"1","date_updated":"2023-09-07T11:57:01Z","status":"public","related_material":{"record":[{"id":"1729","relation":"part_of_dissertation","status":"public"},{"status":"public","relation":"part_of_dissertation","id":"2218"},{"relation":"part_of_dissertation","status":"public","id":"2445"}]},"ddc":["000"],"main_file_link":[{"url":"http://thorstent.github.io/theses/phd_thorsten_tarrach.pdf","open_access":"1"}],"month":"07","citation":{"short":"T. Tarrach, Automatic Synthesis of Synchronisation Primitives for Concurrent Programs, Institute of Science and Technology Austria, 2016.","ieee":"T. Tarrach, “Automatic synthesis of synchronisation primitives for concurrent programs,” Institute of Science and Technology Austria, 2016.","apa":"Tarrach, T. (2016). <i>Automatic synthesis of synchronisation primitives for concurrent programs</i>. Institute of Science and Technology Austria. <a href=\"https://doi.org/10.15479/at:ista:1130\">https://doi.org/10.15479/at:ista:1130</a>","ama":"Tarrach T. Automatic synthesis of synchronisation primitives for concurrent programs. 2016. doi:<a href=\"https://doi.org/10.15479/at:ista:1130\">10.15479/at:ista:1130</a>","chicago":"Tarrach, Thorsten. “Automatic Synthesis of Synchronisation Primitives for Concurrent Programs.” Institute of Science and Technology Austria, 2016. <a href=\"https://doi.org/10.15479/at:ista:1130\">https://doi.org/10.15479/at:ista:1130</a>.","mla":"Tarrach, Thorsten. <i>Automatic Synthesis of Synchronisation Primitives for Concurrent Programs</i>. Institute of Science and Technology Austria, 2016, doi:<a href=\"https://doi.org/10.15479/at:ista:1130\">10.15479/at:ista:1130</a>.","ista":"Tarrach T. 2016. Automatic synthesis of synchronisation primitives for concurrent programs. Institute of Science and Technology Austria."},"publication_status":"published","project":[{"name":"Quantitative Reactive Modeling","grant_number":"267989","_id":"25EE3708-B435-11E9-9278-68D0E5697425","call_identifier":"FP7"},{"_id":"25832EC2-B435-11E9-9278-68D0E5697425","grant_number":"S 11407_N23","name":"Rigorous Systems Engineering","call_identifier":"FWF"},{"call_identifier":"FWF","name":"The Wittgenstein Prize","grant_number":"Z211","_id":"25F42A32-B435-11E9-9278-68D0E5697425"}],"page":"151","day":"07","article_processing_charge":"No","title":"Automatic synthesis of synchronisation primitives for concurrent programs","file_date_updated":"2021-11-17T13:46:55Z","publication_identifier":{"issn":["2663-337X"]},"date_created":"2018-12-11T11:50:19Z","language":[{"iso":"eng"}],"degree_awarded":"PhD","oa":1,"abstract":[{"text":"In this thesis we present a computer-aided programming approach to concurrency. Our approach helps the programmer by automatically fixing concurrency-related bugs, i.e. bugs that occur when the program is executed using an aggressive preemptive scheduler, but not when using a non-preemptive (cooperative) scheduler. Bugs are program behaviours that are incorrect w.r.t. a specification. We consider both user-provided explicit specifications in the form of assertion\r\nstatements in the code as well as an implicit specification. The implicit specification is inferred from the non-preemptive behaviour. Let us consider sequences of calls that the program makes to an external interface. The implicit specification requires that any such sequence produced under a preemptive scheduler should be included in the set of sequences produced under a non-preemptive scheduler. We consider several semantics-preserving fixes that go beyond atomic sections typically explored in the synchronisation synthesis literature. Our synthesis is able to place locks, barriers and wait-signal statements and last, but not least reorder independent statements. The latter may be useful if a thread is released to early, e.g., before some initialisation is completed. We guarantee that our synthesis does not introduce deadlocks and that the synchronisation inserted is optimal w.r.t. a given objective function. We dub our solution trace-based synchronisation synthesis and it is loosely based on counterexample-guided inductive synthesis (CEGIS). The synthesis works by discovering a trace that is incorrect w.r.t. the specification and identifying ordering constraints crucial to trigger the specification violation. Synchronisation may be placed immediately (greedy approach) or delayed until all incorrect traces are found (non-greedy approach). For the non-greedy approach we construct a set of global constraints over synchronisation placements. Each model of the global constraints set corresponds to a correctness-ensuring synchronisation placement. The placement that is optimal w.r.t. the given objective function is chosen as the synchronisation solution. We evaluate our approach on a number of realistic (albeit simplified) Linux device-driver\r\nbenchmarks. The benchmarks are versions of the drivers with known concurrency-related bugs. For the experiments with an explicit specification we added assertions that would detect the bugs in the experiments. Device drivers lend themselves to implicit specification, where the device and the operating system are the external interfaces. Our experiments demonstrate that our synthesis method is precise and efficient. We implemented objective functions for coarse-grained and fine-grained locking and observed that different synchronisation placements are produced for our experiments, favouring e.g. a minimal number of synchronisation operations or maximum concurrency.","lang":"eng"}],"ec_funded":1,"date_published":"2016-07-07T00:00:00Z","oa_version":"Published Version","department":[{"_id":"ToHe"},{"_id":"GradSch"}],"file":[{"file_name":"2016_Tarrach_Thesis.pdf","relation":"main_file","content_type":"application/pdf","date_created":"2021-02-22T11:39:32Z","file_size":1523935,"date_updated":"2021-02-22T11:39:32Z","checksum":"319a506831650327e85376db41fc1094","creator":"dernst","access_level":"open_access","success":1,"file_id":"9179"},{"access_level":"closed","file_id":"10296","content_type":"application/pdf","relation":"main_file","file_name":"2016_Tarrach_Thesispdfa.pdf","checksum":"39efcd789f0ad859ff15652cb7afc412","creator":"cchlebak","date_updated":"2021-11-17T13:46:55Z","file_size":1306068,"date_created":"2021-11-16T14:14:38Z"}],"publisher":"Institute of Science and Technology Austria","type":"dissertation","supervisor":[{"full_name":"Henzinger, Thomas A","last_name":"Henzinger","id":"40876CD8-F248-11E8-B48F-1D18A9856A87","orcid":"0000−0002−2985−7724","first_name":"Thomas A"}],"publist_id":"6230"}