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<titleInfo><title>XSpeed: Accelerating reachability analysis on multi-core processors</title></titleInfo>

  
  
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<name type="personal">
  <namePart type="given">Rajarshi</namePart>
  <namePart type="family">Ray</namePart>
  <role><roleTerm type="text">author</roleTerm> </role></name>
<name type="personal">
  <namePart type="given">Amit</namePart>
  <namePart type="family">Gurung</namePart>
  <role><roleTerm type="text">author</roleTerm> </role></name>
<name type="personal">
  <namePart type="given">Binayak</namePart>
  <namePart type="family">Das</namePart>
  <role><roleTerm type="text">author</roleTerm> </role></name>
<name type="personal">
  <namePart type="given">Ezio</namePart>
  <namePart type="family">Bartocci</namePart>
  <role><roleTerm type="text">author</roleTerm> </role></name>
<name type="personal">
  <namePart type="given">Sergiy</namePart>
  <namePart type="family">Bogomolov</namePart>
  <role><roleTerm type="text">author</roleTerm> </role><identifier type="local">369D9A44-F248-11E8-B48F-1D18A9856A87</identifier><description xsi:type="identifierDefinition" type="orcid">0000-0002-0686-0365</description></name>
<name type="personal">
  <namePart type="given">Radu</namePart>
  <namePart type="family">Grosu</namePart>
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  <namePart>HVC: Haifa Verification Conference</namePart>
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  <namePart>Quantitative Reactive Modeling</namePart>
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  <namePart>Formal methods for the design and analysis of complex systems</namePart>
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<abstract lang="eng">We present XSpeed a parallel state-space exploration algorithm for continuous systems with linear dynamics and nondeterministic inputs. The motivation of having parallel algorithms is to exploit the computational power of multi-core processors to speed-up performance. The parallelization is achieved on two fronts. First, we propose a parallel implementation of the support function algorithm by sampling functions in parallel. Second, we propose a parallel state-space exploration by slicing the time horizon and computing the reachable states in the time slices in parallel. The second method can be however applied only to a class of linear systems with invertible dynamics and fixed input. A GP-GPU implementation is also presented following a lazy evaluation strategy on support functions. The parallel algorithms are implemented in the tool XSpeed. We evaluated the performance on two benchmarks including an 28 dimension Helicopter model. Comparison with the sequential counterpart shows a maximum speed-up of almost 7× on a 6 core, 12 thread Intel Xeon CPU E5-2420 processor. Our GP-GPU implementation shows a maximum speed-up of 12× over the sequential implementation and 53× over SpaceEx (LGG scenario), the state of the art tool for reachability analysis of linear hybrid systems. Experiments illustrate that our parallel algorithm with time slicing not only speeds-up performance but also improves precision.</abstract>

<originInfo><publisher>Springer</publisher><dateIssued encoding="w3cdtf">2015</dateIssued><place><placeTerm type="text">Haifa, Israel</placeTerm></place>
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<language><languageTerm authority="iso639-2b" type="code">eng</languageTerm>
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<relatedItem type="host"><identifier type="doi">10.1007/978-3-319-26287-1_1</identifier>
<part><detail type="volume"><number>9434</number></detail><extent unit="pages">3 - 18</extent>
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<ista>Ray R, Gurung A, Das B, Bartocci E, Bogomolov S, Grosu R. 2015. XSpeed: Accelerating reachability analysis on multi-core processors. 9434, 3–18.</ista>
<chicago>Ray, Rajarshi, Amit Gurung, Binayak Das, Ezio Bartocci, Sergiy Bogomolov, and Radu Grosu. “XSpeed: Accelerating Reachability Analysis on Multi-Core Processors.” Lecture Notes in Computer Science. Springer, 2015. &lt;a href=&quot;https://doi.org/10.1007/978-3-319-26287-1_1&quot;&gt;https://doi.org/10.1007/978-3-319-26287-1_1&lt;/a&gt;.</chicago>
<ieee>R. Ray, A. Gurung, B. Das, E. Bartocci, S. Bogomolov, and R. Grosu, “XSpeed: Accelerating reachability analysis on multi-core processors,” vol. 9434. Springer, pp. 3–18, 2015.</ieee>
<ama>Ray R, Gurung A, Das B, Bartocci E, Bogomolov S, Grosu R. XSpeed: Accelerating reachability analysis on multi-core processors. 2015;9434:3-18. doi:&lt;a href=&quot;https://doi.org/10.1007/978-3-319-26287-1_1&quot;&gt;10.1007/978-3-319-26287-1_1&lt;/a&gt;</ama>
<short>R. Ray, A. Gurung, B. Das, E. Bartocci, S. Bogomolov, R. Grosu, 9434 (2015) 3–18.</short>
<mla>Ray, Rajarshi, et al. &lt;i&gt;XSpeed: Accelerating Reachability Analysis on Multi-Core Processors&lt;/i&gt;. Vol. 9434, Springer, 2015, pp. 3–18, doi:&lt;a href=&quot;https://doi.org/10.1007/978-3-319-26287-1_1&quot;&gt;10.1007/978-3-319-26287-1_1&lt;/a&gt;.</mla>
<apa>Ray, R., Gurung, A., Das, B., Bartocci, E., Bogomolov, S., &amp;#38; Grosu, R. (2015). XSpeed: Accelerating reachability analysis on multi-core processors. Presented at the HVC: Haifa Verification Conference, Haifa, Israel: Springer. &lt;a href=&quot;https://doi.org/10.1007/978-3-319-26287-1_1&quot;&gt;https://doi.org/10.1007/978-3-319-26287-1_1&lt;/a&gt;</apa>
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