@inproceedings{4588,
  abstract     = {We present a formal model for concurrent systems. The model represents synchronous and asynchronous components in a uniform framework that supports compositional (assume-guarantee) and hierarchical (stepwise refinement) reasoning. While synchronous models are based on a notion of atomic computation step, and asynchronous models remove that notion by introducing stuttering, our model is based on a flexible notion of what constitutes a computation step: by applying an abstraction operator to a system, arbitrarily many consecutive steps can be collapsed into a single step. The abstraction operator, which may turn an asynchronous system into a synchronous one, allows us to describe systems at various levels of temporal detail. For describing systems at various levels of spatial detail, we use a hiding operator that may turn a synchronous system into an asynchronous one. We illustrate the model with diverse examples from synchronous circuits, asynchronous shared-memory programs, and synchronous message passing},
  author       = {Alur, Rajeev and Henzinger, Thomas A},
  booktitle    = {Proceedings 11th Annual IEEE Symposium on Logic in Computer Science},
  issn         = {0018-9162},
  location     = {New Brunswick, NJ, USA},
  pages        = {207 -- 218},
  publisher    = {IEEE},
  title        = {{Reactive modules}},
  doi          = {10.1109/LICS.1996.561320},
  year         = {1996},
}