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<titleInfo><title>Efficiency guarantees for parallel incremental algorithms under relaxed schedulers</title></titleInfo>


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<name type="personal">
  <namePart type="given">Dan-Adrian</namePart>
  <namePart type="family">Alistarh</namePart>
  <role><roleTerm type="text">author</roleTerm> </role><identifier type="local">4A899BFC-F248-11E8-B48F-1D18A9856A87</identifier><description xsi:type="identifierDefinition" type="orcid">0000-0003-3650-940X</description></name>
<name type="personal">
  <namePart type="given">Giorgi</namePart>
  <namePart type="family">Nadiradze</namePart>
  <role><roleTerm type="text">author</roleTerm> </role><identifier type="local">3279A00C-F248-11E8-B48F-1D18A9856A87</identifier><description xsi:type="identifierDefinition" type="orcid">0000-0001-5634-0731</description></name>
<name type="personal">
  <namePart type="given">Nikita</namePart>
  <namePart type="family">Koval</namePart>
  <role><roleTerm type="text">author</roleTerm> </role><identifier type="local">2F4DB10C-F248-11E8-B48F-1D18A9856A87</identifier></name>







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<name type="conference">
  <namePart>SPAA: Symposium on Parallelism in Algorithms and Architectures</namePart>
</name>



<name type="corporate">
  <namePart>Elastic Coordination for Scalable Machine Learning</namePart>
  <role><roleTerm type="text">project</roleTerm></role>
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<abstract lang="eng">Several classic problems in graph processing and computational geometry are solved via incremental algorithms, which split computation into a series of small tasks acting on shared state, which gets updated progressively. While the sequential variant of such algorithms usually specifies a fixed (but sometimes random) order in which the tasks should be performed, a standard approach to parallelizing such algorithms is to relax this constraint to allow for out-of-order parallel execution. This is the case for parallel implementations of Dijkstra&apos;s single-source shortest-paths (SSSP) algorithm, and for parallel Delaunay mesh triangulation. While many software frameworks parallelize incremental computation in this way, it is still not well understood whether this relaxed ordering approach can still provide any complexity guarantees. In this paper, we address this problem, and analyze the efficiency guarantees provided by a range of incremental algorithms when parallelized via relaxed schedulers. We show that, for algorithms such as Delaunay mesh triangulation and sorting by insertion, schedulers with a maximum relaxation factor of k in terms of the maximum priority inversion allowed will introduce a maximum amount of wasted work of O(łog n poly(k)), where n is the number of tasks to be executed. For SSSP, we show that the additional work is O(poly(k), dmax / wmin), where dmax is the maximum distance between two nodes, and wmin is the minimum such distance. In practical settings where n &gt;&gt; k, this suggests that the overheads of relaxation will be outweighed by the improved scalability of the relaxed scheduler. On the negative side, we provide lower bounds showing that certain algorithms will inherently incur a non-trivial amount of wasted work due to scheduler relaxation, even for relatively benign relaxed schedulers.</abstract>

<originInfo><publisher>ACM</publisher><dateIssued encoding="w3cdtf">2019</dateIssued><place><placeTerm type="text">Phoenix, AZ, United States</placeTerm></place>
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<language><languageTerm authority="iso639-2b" type="code">eng</languageTerm>
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<relatedItem type="host"><titleInfo><title>31st ACM Symposium on Parallelism in Algorithms and Architectures</title></titleInfo>
  <identifier type="isbn">9781450361842</identifier>
  <identifier type="arXiv">2003.09363</identifier>
  <identifier type="ISI">000507618500018</identifier><identifier type="doi">10.1145/3323165.3323201</identifier>
<part><extent unit="pages">145-154</extent>
</part>
</relatedItem>
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  <location>     <url>https://research-explorer.ista.ac.at/record/10429</url>  </location>
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<bibliographicCitation>
<chicago>Alistarh, Dan-Adrian, Giorgi Nadiradze, and Nikita Koval. “Efficiency Guarantees for Parallel Incremental Algorithms under Relaxed Schedulers.” In &lt;i&gt;31st ACM Symposium on Parallelism in Algorithms and Architectures&lt;/i&gt;, 145–54. ACM, 2019. &lt;a href=&quot;https://doi.org/10.1145/3323165.3323201&quot;&gt;https://doi.org/10.1145/3323165.3323201&lt;/a&gt;.</chicago>
<ieee>D.-A. Alistarh, G. Nadiradze, and N. Koval, “Efficiency guarantees for parallel incremental algorithms under relaxed schedulers,” in &lt;i&gt;31st ACM Symposium on Parallelism in Algorithms and Architectures&lt;/i&gt;, Phoenix, AZ, United States, 2019, pp. 145–154.</ieee>
<ama>Alistarh D-A, Nadiradze G, Koval N. Efficiency guarantees for parallel incremental algorithms under relaxed schedulers. In: &lt;i&gt;31st ACM Symposium on Parallelism in Algorithms and Architectures&lt;/i&gt;. ACM; 2019:145-154. doi:&lt;a href=&quot;https://doi.org/10.1145/3323165.3323201&quot;&gt;10.1145/3323165.3323201&lt;/a&gt;</ama>
<apa>Alistarh, D.-A., Nadiradze, G., &amp;#38; Koval, N. (2019). Efficiency guarantees for parallel incremental algorithms under relaxed schedulers. In &lt;i&gt;31st ACM Symposium on Parallelism in Algorithms and Architectures&lt;/i&gt; (pp. 145–154). Phoenix, AZ, United States: ACM. &lt;a href=&quot;https://doi.org/10.1145/3323165.3323201&quot;&gt;https://doi.org/10.1145/3323165.3323201&lt;/a&gt;</apa>
<ista>Alistarh D-A, Nadiradze G, Koval N. 2019. Efficiency guarantees for parallel incremental algorithms under relaxed schedulers. 31st ACM Symposium on Parallelism in Algorithms and Architectures. SPAA: Symposium on Parallelism in Algorithms and Architectures, 145–154.</ista>
<short>D.-A. Alistarh, G. Nadiradze, N. Koval, in:, 31st ACM Symposium on Parallelism in Algorithms and Architectures, ACM, 2019, pp. 145–154.</short>
<mla>Alistarh, Dan-Adrian, et al. “Efficiency Guarantees for Parallel Incremental Algorithms under Relaxed Schedulers.” &lt;i&gt;31st ACM Symposium on Parallelism in Algorithms and Architectures&lt;/i&gt;, ACM, 2019, pp. 145–54, doi:&lt;a href=&quot;https://doi.org/10.1145/3323165.3323201&quot;&gt;10.1145/3323165.3323201&lt;/a&gt;.</mla>
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