17 Publications

Mark all

[17]
2022 | Conference Paper | IST-REx-ID: 10774 | OA
Bartocci E, Ferrere T, Henzinger TA, Nickovic D, Da Costa AO. 2022. Flavors of sequential information flow. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). VMCAI: Verifcation, Model Checking, and Abstract Interpretation, LNCS, vol. 13182, 1–19.
[Preprint] View | DOI | Download Preprint (ext.) | arXiv
 
[16]
2022 | Conference Paper | IST-REx-ID: 11355 | OA
Bartocci E, Ferrere T, Henzinger TA, Nickovic D, Da Costa AO. 2022. Information-flow interfaces. Fundamental Approaches to Software Engineering. FASE: Fundamental Approaches to Software Engineering, LNCS, vol. 13241, 3–22.
[Published Version] View | Files available | DOI | WoS
 
[15]
2020 | Conference Paper | IST-REx-ID: 7348 | OA
Ferrere T, Henzinger TA, Kragl B. 2020. Monitoring event frequencies. 28th EACSL Annual Conference on Computer Science Logic. CSL: Computer Science Logic, LIPIcs, vol. 152, 20.
[Published Version] View | Files available | DOI | arXiv
 
[14]
2020 | Journal Article | IST-REx-ID: 10861
Nickovic D, Lebeltel O, Maler O, Ferrere T, Ulus D. 2020. AMT 2.0: Qualitative and quantitative trace analysis with extended signal temporal logic. International Journal on Software Tools for Technology Transfer. 22(6), 741–758.
View | Files available | DOI | WoS
 
[13]
2019 | Conference Paper | IST-REx-ID: 6428 | OA
Ferrere T, Nickovic D, Donzé A, Ito H, Kapinski J. 2019. Interface-aware signal temporal logic. Proceedings of the 2019 22nd ACM International Conference on Hybrid Systems: Computation and Control. HSCC: Hybrid Systems Computation and Control, 57–66.
[Submitted Version] View | Files available | DOI | WoS
 
[12]
2019 | Journal Article | IST-REx-ID: 7109
Ferrere T, Maler O, Ničković D, Pnueli A. 2019. From real-time logic to timed automata. Journal of the ACM. 66(3), 19.
View | DOI | WoS
 
[11]
2019 | Conference Paper | IST-REx-ID: 7159
Ničković D, Qin X, Ferrere T, Mateis C, Deshmukh J. 2019. Shape expressions for specifying and extracting signal features. 19th International Conference on Runtime Verification. RV: Runtime Verification, LNCS, vol. 11757, 292–309.
View | DOI | WoS
 
[10]
2019 | Conference Paper | IST-REx-ID: 7232
Ferrere T, Maler O, Nickovic D. 2019. Mixed-time signal temporal logic. 17th International Conference on Formal Modeling and Analysis of Timed Systems. FORMATS: Formal Modeling and Anaysis of Timed Systems, LNCS, vol. 11750, 59–75.
View | DOI | WoS
 
[9]
2018 | Conference Paper | IST-REx-ID: 299 | OA
Nickovic D, Lebeltel O, Maler O, Ferrere T, Ulus D. 2018. AMT 2.0: Qualitative and quantitative trace analysis with extended signal temporal logic. TACAS: Tools and Algorithms for the Construction and Analysis of Systems, LNCS, vol. 10806, 303–319.
[Published Version] View | Files available | DOI | WoS
 
[8]
2018 | Conference Paper | IST-REx-ID: 144
Ferrere T, Henzinger TA, Saraç E. 2018. A theory of register monitors. LICS: Logic in Computer Science, ACM/IEEE Symposium on Logic in Computer Science, vol. Part F138033, 394–403.
View | DOI | WoS
 
[7]
2018 | Conference Paper | IST-REx-ID: 182 | OA
Bakhirkin A, Ferrere T, Maler O. 2018. Efficient parametric identification for STL. Proceedings of the 21st International Conference on Hybrid Systems. HSCC: Hybrid Systems: Computation and Control, HSCC Proceedings, , 177–186.
[Submitted Version] View | Files available | DOI | WoS
 
[6]
2018 | Conference Paper | IST-REx-ID: 183
Bartocci E, Ferrere T, Manjunath N, Nickovic D. 2018. Localizing faults in simulink/stateflow models with STL. HSCC: Hybrid Systems: Computation and Control, HSCC Proceedings, , 197–206.
View | DOI | WoS
 
[5]
2018 | Conference Paper | IST-REx-ID: 81 | OA
Elgyütt A, Ferrere T, Henzinger TA. 2018. Monitoring temporal logic with clock variables. FORMATS: Formal Modeling and Analysis of Timed Systems, LNCS, vol. 11022, 53–70.
[Submitted Version] View | Files available | DOI | WoS
 
[4]
2018 | Conference Paper | IST-REx-ID: 78 | OA
Bakhirkin A, Ferrere T, Nickovic D, Maler O, Asarin E. 2018. Online timed pattern matching using automata. FORMATS: Formal Modeling and Analysis of Timed Systems, LNCS, vol. 11022, 215–232.
[Submitted Version] View | Files available | DOI | WoS
 
[3]
2018 | Conference Paper | IST-REx-ID: 156 | OA
Ferrere T. 2018. The compound interest in relaxing punctuality. FM: International Symposium on Formal Methods, LNCS, vol. 10951, 147–164.
[Submitted Version] View | Files available | DOI | WoS
 
[2]
2018 | Conference Paper | IST-REx-ID: 5959 | OA
Bakhirkin A, Ferrere T, Henzinger TA, Nickovicl D. 2018. Keynote: The first-order logic of signals. 2018 International Conference on Embedded Software. EMSOFT: International Conference on Embedded Software, 1–10.
[Published Version] View | Files available | DOI | WoS
 
[1]
2017 | Conference Paper | IST-REx-ID: 636 | OA
Bakhirkin A, Ferrere T, Maler O, Ulus D. 2017. On the quantitative semantics of regular expressions over real-valued signals. FORMATS: Formal Modelling and Analysis of Timed Systems, LNCS, vol. 10419, 189–206.
[Submitted Version] View | DOI | Download Submitted Version (ext.)
 

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17 Publications

Mark all

[17]
2022 | Conference Paper | IST-REx-ID: 10774 | OA
Bartocci E, Ferrere T, Henzinger TA, Nickovic D, Da Costa AO. 2022. Flavors of sequential information flow. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). VMCAI: Verifcation, Model Checking, and Abstract Interpretation, LNCS, vol. 13182, 1–19.
[Preprint] View | DOI | Download Preprint (ext.) | arXiv
 
[16]
2022 | Conference Paper | IST-REx-ID: 11355 | OA
Bartocci E, Ferrere T, Henzinger TA, Nickovic D, Da Costa AO. 2022. Information-flow interfaces. Fundamental Approaches to Software Engineering. FASE: Fundamental Approaches to Software Engineering, LNCS, vol. 13241, 3–22.
[Published Version] View | Files available | DOI | WoS
 
[15]
2020 | Conference Paper | IST-REx-ID: 7348 | OA
Ferrere T, Henzinger TA, Kragl B. 2020. Monitoring event frequencies. 28th EACSL Annual Conference on Computer Science Logic. CSL: Computer Science Logic, LIPIcs, vol. 152, 20.
[Published Version] View | Files available | DOI | arXiv
 
[14]
2020 | Journal Article | IST-REx-ID: 10861
Nickovic D, Lebeltel O, Maler O, Ferrere T, Ulus D. 2020. AMT 2.0: Qualitative and quantitative trace analysis with extended signal temporal logic. International Journal on Software Tools for Technology Transfer. 22(6), 741–758.
View | Files available | DOI | WoS
 
[13]
2019 | Conference Paper | IST-REx-ID: 6428 | OA
Ferrere T, Nickovic D, Donzé A, Ito H, Kapinski J. 2019. Interface-aware signal temporal logic. Proceedings of the 2019 22nd ACM International Conference on Hybrid Systems: Computation and Control. HSCC: Hybrid Systems Computation and Control, 57–66.
[Submitted Version] View | Files available | DOI | WoS
 
[12]
2019 | Journal Article | IST-REx-ID: 7109
Ferrere T, Maler O, Ničković D, Pnueli A. 2019. From real-time logic to timed automata. Journal of the ACM. 66(3), 19.
View | DOI | WoS
 
[11]
2019 | Conference Paper | IST-REx-ID: 7159
Ničković D, Qin X, Ferrere T, Mateis C, Deshmukh J. 2019. Shape expressions for specifying and extracting signal features. 19th International Conference on Runtime Verification. RV: Runtime Verification, LNCS, vol. 11757, 292–309.
View | DOI | WoS
 
[10]
2019 | Conference Paper | IST-REx-ID: 7232
Ferrere T, Maler O, Nickovic D. 2019. Mixed-time signal temporal logic. 17th International Conference on Formal Modeling and Analysis of Timed Systems. FORMATS: Formal Modeling and Anaysis of Timed Systems, LNCS, vol. 11750, 59–75.
View | DOI | WoS
 
[9]
2018 | Conference Paper | IST-REx-ID: 299 | OA
Nickovic D, Lebeltel O, Maler O, Ferrere T, Ulus D. 2018. AMT 2.0: Qualitative and quantitative trace analysis with extended signal temporal logic. TACAS: Tools and Algorithms for the Construction and Analysis of Systems, LNCS, vol. 10806, 303–319.
[Published Version] View | Files available | DOI | WoS
 
[8]
2018 | Conference Paper | IST-REx-ID: 144
Ferrere T, Henzinger TA, Saraç E. 2018. A theory of register monitors. LICS: Logic in Computer Science, ACM/IEEE Symposium on Logic in Computer Science, vol. Part F138033, 394–403.
View | DOI | WoS
 
[7]
2018 | Conference Paper | IST-REx-ID: 182 | OA
Bakhirkin A, Ferrere T, Maler O. 2018. Efficient parametric identification for STL. Proceedings of the 21st International Conference on Hybrid Systems. HSCC: Hybrid Systems: Computation and Control, HSCC Proceedings, , 177–186.
[Submitted Version] View | Files available | DOI | WoS
 
[6]
2018 | Conference Paper | IST-REx-ID: 183
Bartocci E, Ferrere T, Manjunath N, Nickovic D. 2018. Localizing faults in simulink/stateflow models with STL. HSCC: Hybrid Systems: Computation and Control, HSCC Proceedings, , 197–206.
View | DOI | WoS
 
[5]
2018 | Conference Paper | IST-REx-ID: 81 | OA
Elgyütt A, Ferrere T, Henzinger TA. 2018. Monitoring temporal logic with clock variables. FORMATS: Formal Modeling and Analysis of Timed Systems, LNCS, vol. 11022, 53–70.
[Submitted Version] View | Files available | DOI | WoS
 
[4]
2018 | Conference Paper | IST-REx-ID: 78 | OA
Bakhirkin A, Ferrere T, Nickovic D, Maler O, Asarin E. 2018. Online timed pattern matching using automata. FORMATS: Formal Modeling and Analysis of Timed Systems, LNCS, vol. 11022, 215–232.
[Submitted Version] View | Files available | DOI | WoS
 
[3]
2018 | Conference Paper | IST-REx-ID: 156 | OA
Ferrere T. 2018. The compound interest in relaxing punctuality. FM: International Symposium on Formal Methods, LNCS, vol. 10951, 147–164.
[Submitted Version] View | Files available | DOI | WoS
 
[2]
2018 | Conference Paper | IST-REx-ID: 5959 | OA
Bakhirkin A, Ferrere T, Henzinger TA, Nickovicl D. 2018. Keynote: The first-order logic of signals. 2018 International Conference on Embedded Software. EMSOFT: International Conference on Embedded Software, 1–10.
[Published Version] View | Files available | DOI | WoS
 
[1]
2017 | Conference Paper | IST-REx-ID: 636 | OA
Bakhirkin A, Ferrere T, Maler O, Ulus D. 2017. On the quantitative semantics of regular expressions over real-valued signals. FORMATS: Formal Modelling and Analysis of Timed Systems, LNCS, vol. 10419, 189–206.
[Submitted Version] View | DOI | Download Submitted Version (ext.)
 

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