Synthesis of memory efficient real time controllers for safety objectives
Chatterjee K, Prabhu V. 2011. Synthesis of memory efficient real time controllers for safety objectives. HSCC: Hybrid Systems - Computation and Control, 221–230.
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http://arxiv.org/abs/1101.5842
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Conference Paper
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Author
Chatterjee, KrishnenduISTA ;
Prabhu, Vinayak
Corresponding author has ISTA affiliation
Department
Abstract
We study synthesis of controllers for real-time systems, where the objective is to stay in a given safe set. The problem is solved by obtaining winning strategies in the setting of concurrent two-player timed automaton games with safety objectives. To prevent a player from winning by blocking time, we restrict each player to strategies that ensure that the player cannot be responsible for causing a zeno run. We construct winning strategies for the controller which require access only to (1) the system clocks (thus, controllers which require their own internal infinitely precise clocks are not necessary), and (2) a linear (in the number of clocks) number of memory bits. Precisely, we show that for safety objectives, a memory of size (3 · |C|+lg(|C|+1)) bits suffices for winning controller strategies, where C is the set of clocks of the timed automaton game, significantly improving the previous known exponential bound. We also settle the open question of whether winning region controller strategies require memory for safety objectives by showing with an example the necessity of memory for region strategies to win for safety objectives.
Publishing Year
Date Published
2011-01-31
Publisher
Springer
Page
221 - 230
Conference
HSCC: Hybrid Systems - Computation and Control
Conference Location
Chicago, USA
Conference Date
2011-04-12 – 2011-04-14
IST-REx-ID
Cite this
Chatterjee K, Prabhu V. Synthesis of memory efficient real time controllers for safety objectives. In: Springer; 2011:221-230. doi:10.1145/1967701.1967734
Chatterjee, K., & Prabhu, V. (2011). Synthesis of memory efficient real time controllers for safety objectives (pp. 221–230). Presented at the HSCC: Hybrid Systems - Computation and Control, Chicago, USA: Springer. https://doi.org/10.1145/1967701.1967734
Chatterjee, Krishnendu, and Vinayak Prabhu. “Synthesis of Memory Efficient Real Time Controllers for Safety Objectives,” 221–30. Springer, 2011. https://doi.org/10.1145/1967701.1967734.
K. Chatterjee and V. Prabhu, “Synthesis of memory efficient real time controllers for safety objectives,” presented at the HSCC: Hybrid Systems - Computation and Control, Chicago, USA, 2011, pp. 221–230.
Chatterjee K, Prabhu V. 2011. Synthesis of memory efficient real time controllers for safety objectives. HSCC: Hybrid Systems - Computation and Control, 221–230.
Chatterjee, Krishnendu, and Vinayak Prabhu. Synthesis of Memory Efficient Real Time Controllers for Safety Objectives. Springer, 2011, pp. 221–30, doi:10.1145/1967701.1967734.
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