Please note that LibreCat no longer supports Internet Explorer versions 8 or 9 (or earlier).

We recommend upgrading to the latest Internet Explorer, Google Chrome, or Firefox.




387 Publications

2016 | Conference Paper | IST-REx-ID: 1135 | OA
Avni, Guy, Shibashis Guha, and Guillermo Rodríguez Navas. “Synthesizing Time Triggered Schedules for Switched Networks with Faulty Links.” In Proceedings of the 13th International Conference on Embedded Software . ACM, 2016. https://doi.org/10.1145/2968478.2968499.
[Submitted Version] View | Files available | DOI
 
2016 | Conference Paper | IST-REx-ID: 1134
Duggirala, Parasara, Chuchu Fan, Matthew Potok, Bolun Qi, Sayan Mitra, Mahesh Viswanathan, Stanley Bak, et al. “Tutorial: Software Tools for Hybrid Systems Verification Transformation and Synthesis C2E2 HyST and TuLiP.” In 2016 IEEE Conference on Control Applications. IEEE, 2016. https://doi.org/10.1109/CCA.2016.7587948.
View | DOI
 
2016 | Conference Paper | IST-REx-ID: 1138 | OA
Chatterjee, Krishnendu, Thomas A Henzinger, and Jan Otop. “Quantitative Automata under Probabilistic Semantics.” In Proceedings of the 31st Annual ACM/IEEE Symposium, 76–85. IEEE, 2016. https://doi.org/10.1145/2933575.2933588.
[Preprint] View | DOI | Download Preprint (ext.) | arXiv
 
2016 | Conference Paper | IST-REx-ID: 1227 | OA
Kong, Hui, Ezio Bartocci, Sergiy Bogomolov, Radu Grosu, Thomas A Henzinger, Yu Jiang, and Christian Schilling. “Discrete Abstraction of Multiaffine Systems,” 9957:128–44. Springer, 2016. https://doi.org/10.1007/978-3-319-47151-8_9.
[Submitted Version] View | Files available | DOI
 
2016 | Conference Paper | IST-REx-ID: 1256 | OA
Jiang, Yu, Yixiao Yang, Han Liu, Hui Kong, Ming Gu, Jiaguang Sun, and Lui Sha. “From Stateflow Simulation to Verified Implementation: A Verification Approach and a Real-Time Train Controller Design.” IEEE, 2016. https://doi.org/10.1109/RTAS.2016.7461337.
[Submitted Version] View | Files available | DOI
 

Search

Filter Publications