3 Publications

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[3]
2025 | Published | Conference Paper | IST-REx-ID: 19668 | OA
E. Yu, D. Zikelic, and T. A. Henzinger, “Neural control and certificate repair via runtime monitoring,” in Proceedings of the 39th AAAI Conference on Artificial Intelligence, Philadelphia, PA, United States, 2025, vol. 39, no. 25, pp. 26409–26417.
[Preprint] View | DOI | Download Preprint (ext.) | arXiv
 
[2]
2024 | Published | Conference Paper | IST-REx-ID: 17413 | OA
N. Froleyks, E. Yu, A. Biere, and K. Heljanko, “Certifying phase abstraction,” in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Nancy, France, 2024, vol. 14739, pp. 284–303.
[Published Version] View | Files available | DOI | arXiv
 
[1]
2024 | Submitted | Conference Paper | IST-REx-ID: 17053
N. Froleyks, E. Yu, and A. Biere, “Ternary simulation as abstract interpretation (Work in Progress),” in 27th Workshop on Methods and Description Languages for Modeling and Verification of Circuits and Systems, Kaiserslautern, Germany, pp. 148–151.
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3 Publications

Mark all

[3]
2025 | Published | Conference Paper | IST-REx-ID: 19668 | OA
E. Yu, D. Zikelic, and T. A. Henzinger, “Neural control and certificate repair via runtime monitoring,” in Proceedings of the 39th AAAI Conference on Artificial Intelligence, Philadelphia, PA, United States, 2025, vol. 39, no. 25, pp. 26409–26417.
[Preprint] View | DOI | Download Preprint (ext.) | arXiv
 
[2]
2024 | Published | Conference Paper | IST-REx-ID: 17413 | OA
N. Froleyks, E. Yu, A. Biere, and K. Heljanko, “Certifying phase abstraction,” in Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Nancy, France, 2024, vol. 14739, pp. 284–303.
[Published Version] View | Files available | DOI | arXiv
 
[1]
2024 | Submitted | Conference Paper | IST-REx-ID: 17053
N. Froleyks, E. Yu, and A. Biere, “Ternary simulation as abstract interpretation (Work in Progress),” in 27th Workshop on Methods and Description Languages for Modeling and Verification of Circuits and Systems, Kaiserslautern, Germany, pp. 148–151.
View
 

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Citation Style: IEEE

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